AS4C4M16SA dram equivalent, 64m synchronous dram.
* Fast access time from clock: 5.4 ns
* Fast clock rate: 166 MHz
* Fully synchronous operation
* AEC-Q100 Compliant
* Internal pipelined architecture .
requiring high memory bandwidth and particularly well suited to high performance PC applications.
Table 1. Key Specific.
Table 3. Pin Details
Symbol CLK CKE
BA0,BA1
Type Input Input
Input
Description
Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls.
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